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| int64_t | signExtend (uint32_t val, int bits) |
| | Sign-extends a 32-bit unsigned integer to a 64-bit signed integer.
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std::string | xRegName (unsigned reg, EZeroRegOrStackPointer at31) |
| | Returns the name of an ARM64 general-purpose X-register.
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std::string | wRegName (unsigned reg, EZeroRegOrStackPointer at31) |
| | Returns the name of an ARM64 general-purpose W-register.
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| int | resolveRegIndex (unsigned reg, EZeroRegOrStackPointer at31) |
| | Resolves a raw 5-bit encoded register field into a trackable index, without naming it.
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| int | regIndex (const std::string &name) |
| | Inverse of xRegName()/wRegName(): maps a decoded register name back to its index.
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| std::string | branchCondName (uint32_t cond) |
| | Returns the name of a conditional execution flag.
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| std::string | typeToString (EKittyInsnTypeArm64 t) |
| | Converts an EKittyInsnTypeArm64 to a string representation.
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| uint8_t | loadStoreWidth (EKittyInsnTypeArm64 t) |
| | Load/Store access width in bytes for an AArch64 instruction type.
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| bool | isLoad (EKittyInsnTypeArm64 t) |
| | True when t is one of the load instruction types.
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| bool | isStore (EKittyInsnTypeArm64 t) |
| | True when t is one of the store instruction types.
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| EKittyInsnTypeArm64 | decodeInsnType (uint32_t instr) |
| | Decodes type of an ARM64 instruction.
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| KittyInsnArm64 | decodeInsn (uint32_t instr, uint64_t address=0) |
| | Decodes an ARM64 instruction.
|
Namespace containing utility functions for ARM64 instructions.
This namespace provides utility functions for decoding ARM64 instructions,
What register index 31 means in a given instruction field.
AArch64 overloads register 31: in most contexts it is the zero register (XZR/WZR, reads as 0 and discards writes), but in the "add/subtract
(immediate)" instruction class it is SP in both the Rd and Rn fields - there is no "ADD XZR, ..." immediate form. Which one applies is a property of the specific instruction and field being decoded, not of whether the field happens to be the "first" or "second" operand, so it must be passed explicitly by each call site rather than guessed from position.
| Enumerator |
|---|
| ZeroRegister | register 31 denotes XZR/WZR
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| StackPointer | register 31 denotes SP
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| uint8_t KittyArm64::loadStoreWidth |
( |
EKittyInsnTypeArm64 | t | ) |
|
Load/Store access width in bytes for an AArch64 instruction type.
Covers the pre-indexed, post-indexed, unscaled and literal forms as well as the plain ones: the type is the only thing that carries the width, so a form missing from here reports the wrong size rather than no size.
Reports 0 for anything that is not a load or store, matching the ARM32 twin: width is non-zero exactly for the types isLoad/isStore accept, so a caller never has to check those first to get a trustworthy answer.
- Parameters
-
| t | The instruction type to query. |
- Returns
- 1/2/4/8 for the byte/halfword/word/doubleword forms; 0 for a type that is not a load or store at all.
Resolves a raw 5-bit encoded register field into a trackable index, without naming it.
Not a parse - unlike regIndex(), which recovers an index from a rendered name, this takes the hardware field straight from the instruction word and applies the same register-31 business rule xRegName()/wRegName() use to name it, so regIndex(xRegName(reg, at31)) == resolveRegIndex(reg,
at31) by construction. That is what the analyzer calls: formatting a 5-bit field as "X3" only to parse it back is most of what a decode used to cost.
- Returns
- 0-31, or -1 for the zero register, which never holds a base.
1.15.0